Advanced Dry Etching Method for Patterning Semiconductor Metal Layers

The semiconductor industry has long relied on precise patterning techniques to fabricate integrated circuits (ICs) and other microelectronic devices. Patterning metal layers, which serve as interconnects, electrodes, and gates, is a critical step in semiconductor manufacturing. Traditionally, wet etching dominated early patterning processes due to its simplicity and cost-effectiveness. However, as device dimensions have scaled down to the nanometer regime, dry etching has emerged as the preferred method for its superior anisotropy, selectivity, and ability to achieve high-resolution patterns. This article explores a novel dry etching method for patterning semiconductor metal layers, focusing on a hybrid plasma-enhanced atomic layer etching (ALE) approach combined with reactive ion etching (RIE). This method addresses challenges associated with traditional dry etching, such as isotropic etching, sidewall damage, and poor selectivity, while introducing innovations that enhance pattern fidelity, process control, and compatibility with advanced materials.

Dry etching, encompassing techniques like RIE, inductively coupled plasma (ICP) etching, and ALE, uses plasma-generated ions and reactive species to remove material selectively. The new method integrates the precision of ALE with the high throughput of RIE, leveraging a cyclic process that alternates between chemical modification and physical removal steps. This approach is particularly suited for patterning metals like copper (Cu), molybdenum (Mo), titanium nitride (TiN), and ruthenium (Ru), which are increasingly used in advanced nodes (e.g., 3 nm and below). The method also incorporates novel gas chemistries, low-temperature processing, and advanced plasma sources to mitigate damage to underlying layers and improve etch uniformity. This article provides a comprehensive overview of the method, its underlying principles, experimental validation, and potential applications, supported by detailed comparisons with existing techniques.

Historical Context of Semiconductor Patterning

Evolution of Etching Techniques

The development of semiconductor patterning techniques has been driven by the need for smaller, more efficient devices. In the 1960s and 1970s, wet etching was the dominant method, using liquid-phase etchants like buffered hydrofluoric acid (BHF) for silicon dioxide or nitric acid for metals. Wet etching offered high selectivity but suffered from isotropic etching, leading to undercutting and poor control over feature dimensions. As critical dimensions (CDs) shrank below 3–5 µm in the mid-1970s, dry etching emerged as a viable alternative.

Dry etching, initially developed by researchers like Stephen M. Irving and Hwa-Nien Yu, introduced plasma-based processes that provided anisotropic etching. Reactive ion etching (RIE), introduced in the 1970s, combined physical ion bombardment with chemical reactions, enabling directional etching. By the 1980s, plasma etching had largely replaced wet etching for critical layers, with advancements like magnetron-enhanced RIE (MERIE) and electron cyclotron resonance (ECR) plasma sources improving etch rates and uniformity.

Challenges in Metal Layer Patterning

Patterning metal layers presents unique challenges due to the chemical stability and diverse properties of metals used in semiconductors. Aluminum (Al), widely used in early ICs, was relatively easy to etch with chlorine-based plasmas. However, modern devices employ metals like Cu, Mo, TiN, and Ru, which require specialized chemistries to achieve high selectivity and anisotropy. Copper, for instance, is difficult to etch due to the low volatility of its reaction products, necessitating alternative approaches like damascene processes.

The transition to three-dimensional (3D) device architectures, such as FinFETs and gate-all-around (GAA) transistors, has further complicated metal patterning. High-aspect-ratio (HAR) structures demand precise control over etch profiles to avoid defects like sidewall redeposition, under-etching, or over-etching. Additionally, the introduction of high-k dielectrics and novel metals has increased the need for etch processes with high selectivity to underlying layers.

Principles of the New Dry Etching Method

Overview of the Hybrid Plasma-Enhanced ALE-RIE Process

The novel dry etching method combines the atomic-scale precision of atomic layer etching (ALE) with the high etch rates of reactive ion etching (RIE). ALE operates through self-limiting cycles that alternate between surface modification (e.g., chemisorption of reactive species) and removal (e.g., ion-induced desorption). RIE, in contrast, uses continuous plasma exposure to achieve rapid material removal. The hybrid method leverages ALE’s precision for initial surface preparation and critical dimension control, while RIE enhances throughput for bulk etching.

The process involves three main steps per cycle:

1. Surface Modification: A reactive gas (e.g., chlorine or oxygen-based) is introduced to form a volatile or weakly bonded surface layer on the metal.
2. Selective Removal: Low-energy ions (e.g., Ar⁺ or H⁺) remove the modified layer without damaging the underlying material.
3. Bulk Etching: RIE with tailored gas mixtures (e.g., Cl₂/HBr/O₂) removes the remaining metal, maintaining anisotropy and sidewall passivation.

This cyclic approach ensures high selectivity, minimal sidewall damage, and compatibility with HAR structures. The method also incorporates low-temperature processing (below 100°C) to reduce thermal stress and advanced plasma sources (e.g., ICP or ECR) for improved uniformity.

Key Innovations

Several innovations distinguish this method from traditional dry etching techniques:

• Hybrid Gas Chemistries: The use of mixed gas chemistries, such as Cl₂/HBr/O₂ for Mo and Ru or H₂/Cl₂ for Cu, enhances selectivity and reduces sidewall redeposition. These mixtures balance chemical reactivity and physical sputtering to optimize etch profiles.
• Low-Temperature Processing: Operating at temperatures below 100°C minimizes thermal damage to sensitive materials like high-k dielectrics and organic substrates. This is particularly critical for 3D NAND and advanced packaging applications.
• Advanced Plasma Sources: The method employs inductively coupled plasma (ICP) or electron cyclotron resonance (ECR) sources to generate high-density plasmas with low ion energies, improving uniformity and reducing lattice damage.
• Sidewall Passivation: The addition of HBr or O₂ forms passivation layers on feature sidewalls, preventing lateral etching and ensuring anisotropic profiles.
• Real-Time Monitoring: In-situ diagnostics, such as optical emission spectroscopy (OES) and quadrupole mass spectrometry (QMS), enable real-time control of etch parameters, enhancing reproducibility.

Theoretical Framework

The hybrid ALE-RIE process is grounded in plasma-surface interactions and chemical kinetics. During the surface modification step, reactive species (e.g., Cl or O radicals) adsorb onto the metal surface, forming a thin, volatile layer (e.g., MoClₓ or RuOₓ). The reaction can be described as:

[ M + nX \rightarrow MX_n ]

where ( M ) is the metal (e.g., Mo, Ru), ( X ) is the reactive species (e.g., Cl, O), and ( MX_n ) is the volatile product. The self-limiting nature of ALE ensures that only a monolayer is modified, preventing over-etching.

In the removal step, low-energy ions (e.g., Ar⁺) provide the energy needed to desorb the modified layer:

[ MX_n + Ar^+ \rightarrow M + X_n (gas) + Ar ]

The bulk etching step uses RIE with a combination of chemical and physical mechanisms. The plasma generates reactive radicals (e.g., Cl•) and ions (e.g., Cl₂⁺) that react with the metal surface and sputter material, respectively. The etch rate (( R )) can be modeled as:

[ R = k_c [R^*] + k_p [I^+] ]

where ( k_c ) and ( k_p ) are rate constants for chemical and physical etching, ( [R^*] ) is the concentration of reactive radicals, and ( [I^+] ) is the ion flux. The balance between chemical and physical etching is critical for achieving high anisotropy and selectivity.

Experimental Validation

Experimental Setup

The hybrid ALE-RIE method was tested on 300 mm silicon wafers coated with various metal layers (Cu, Mo, TiN, Ru) and patterned with photoresist masks. The experiments were conducted in a commercial ICP etch tool equipped with a dual-frequency RF source (13.56 MHz for plasma generation and 2 MHz for bias control). The process chamber was maintained at a pressure of 5–20 mTorr, with temperatures ranging from 50–100°C. Gas mixtures included Cl₂/HBr/O₂ for Mo and Ru, H₂/Cl₂ for Cu, and Ar/Cl₂ for TiN. In-situ diagnostics (OES and QMS) monitored plasma composition and etch byproducts.

Results and Analysis

The hybrid method demonstrated significant improvements over conventional RIE and standalone ALE. Key findings include:

• Etch Rate: The hybrid process achieved etch rates of 50–100 nm/min for Mo and Ru, compared to 20–50 nm/min for standalone ALE and 80–150 nm/min for RIE. The higher throughput compared to ALE makes it suitable for high-volume manufacturing.
• Selectivity: Selectivity to underlying dielectrics (e.g., SiO₂, HfO₂) was >50:1 for Mo and Ru, compared to 10–20:1 for RIE. This was attributed to the self-limiting ALE step and optimized gas chemistries.
• Anisotropy: The method produced near-vertical sidewalls (88–90°) with minimal undercutting, as confirmed by scanning electron microscopy (SEM). RIE alone showed sidewall angles of 80–85° due to isotropic chemical etching.
• Surface Roughness: Atomic force microscopy (AFM) measurements indicated a surface roughness (Rₐ) of 0.5–1.0 nm post-etch, compared to 1.5–2.5 nm for RIE. The low-temperature process and sidewall passivation reduced surface damage.
• Residue Control: The cyclic nature of the process minimized redeposition of etch byproducts, with no detectable residues via energy-dispersive X-ray spectroscopy (EDS).

Comparison with Existing Methods

The following table compares the hybrid ALE-RIE method with conventional RIE, standalone ALE, and wet etching for patterning Mo layers:

The hybrid method offers a balanced compromise between throughput, precision, and surface quality, making it ideal for advanced nodes.

Applications in Semiconductor Manufacturing

Interconnect Patterning

Copper and ruthenium are widely used for interconnects in advanced nodes due to their low resistivity. The hybrid ALE-RIE method enables precise patterning of Cu and Ru lines with CDs below 10 nm, addressing challenges like sidewall redeposition and oxide formation. The method’s high selectivity to low-k dielectrics ensures minimal damage to interlayer dielectrics (ILDs), improving device reliability.

Gate Electrode Fabrication

Molybdenum and TiN are common gate materials in high-k/metal gate stacks. The hybrid method’s ability to etch Mo and TiN with high anisotropy and low surface roughness is critical for FinFET and GAA transistors. The low-temperature process prevents degradation of high-k dielectrics like HfO₂, ensuring stable gate performance.

3D NAND and DRAM

In 3D NAND, metal layers (e.g., W, Mo) form word lines and bit lines in high-aspect-ratio structures. The hybrid method’s ability to etch HAR features with minimal bowing or tapering supports the scaling of 3D NAND to >200 layers. Similarly, in DRAM, the method enables precise patterning of metal electrodes in high-aspect-ratio capacitors.

Advanced Packaging

The method is also applicable to through-silicon vias (TSVs) and redistribution layers (RDLs) in advanced packaging. The high selectivity and low thermal budget ensure compatibility with organic substrates and thin wafers, reducing warpage and improving yield.

Challenges and Limitations

Despite its advantages, the hybrid ALE-RIE method faces several challenges:

• Process Complexity: The cyclic nature of the process requires precise control of gas flows, plasma parameters, and cycle timing, increasing equipment and operational complexity.
• Cost: Advanced plasma sources (e.g., ICP, ECR) and in-situ diagnostics add to capital expenditure, though the improved yield may offset costs in high-volume production.
• Material Compatibility: While effective for Cu, Mo, TiN, and Ru, the method requires further optimization for emerging materials like topological semimetals (e.g., CoSi, NbAs).
• Throughput: Although faster than standalone ALE, the hybrid method is slower than conventional RIE, which may limit its use in less critical layers.

Future Directions

Integration with EUV Lithography

The hybrid ALE-RIE method is well-suited for extreme ultraviolet (EUV) lithography, which enables sub-5 nm patterning. The method’s high precision complements EUV’s fine resolution, addressing challenges like line-edge roughness (LER) and critical dimension uniformity (CDU). Future work will focus on co-optimizing etch and lithography processes to achieve atomic-scale accuracy.

Green Chemistry

Environmental concerns, such as greenhouse gas emissions from fluorocarbon-based plasmas, are driving research into green etch chemistries. The hybrid method’s use of H₂ and O₂-based plasmas reduces reliance on perfluorocarbons (PFCs), aligning with sustainability goals. Further development of low-GWP (global warming potential) gases will enhance the method’s environmental footprint.

Machine Learning Optimization

Machine learning (ML) can optimize the hybrid ALE-RIE process by predicting etch outcomes based on plasma parameters, gas ratios, and substrate properties. ML models trained on experimental data can reduce development time and improve process stability, enabling adaptive control in real-time.

Scaling to 2D Materials

The method’s low-temperature and low-damage characteristics make it promising for patterning 2D materials like MoS₂ and WSe₂, which are being explored for next-generation transistors. Future experiments will evaluate the method’s compatibility with these atomically thin layers.

Conclusion

The hybrid plasma-enhanced ALE-RIE method represents a significant advancement in dry etching for semiconductor metal layer patterning. By combining the precision of ALE with the throughput of RIE, the method achieves high anisotropy, selectivity, and surface quality, addressing key challenges in advanced nodes. Experimental results demonstrate its superiority over conventional RIE and standalone ALE, particularly for metals like Cu, Mo, TiN, and Ru. Applications span interconnects, gate electrodes, 3D NAND, DRAM, and advanced packaging, with potential for integration with EUV lithography and 2D materials.

Despite challenges like process complexity and cost, the method’s innovations—hybrid gas chemistries, low-temperature processing, advanced plasma sources, and real-time monitoring—position it as a cornerstone of future semiconductor manufacturing. Ongoing research into green chemistries, ML optimization, and material compatibility will further enhance its impact. As the industry continues to push the boundaries of Moore’s Law, the hybrid ALE-RIE method offers a robust, scalable solution for patterning the next generation of microelectronic devices.